// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  snps_phy_reg_reg_offset_field.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2017/10/24
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2 
// History       :  xxx 2018/03/16 18:03:12 Create file
// ******************************************************************************

#ifndef __SNPS_PHY_REG_REG_OFFSET_FIELD_H__
#define __SNPS_PHY_REG_REG_OFFSET_FIELD_H__

#define SNPS_PHY_REG_PHY_CR_RESET_LEN    1
#define SNPS_PHY_REG_PHY_CR_RESET_OFFSET 1
#define SNPS_PHY_REG_PHY_RESET_LEN       1
#define SNPS_PHY_REG_PHY_RESET_OFFSET    0

#define SNPS_PHY_REG_PCS_LANE_RESET_LEN    4
#define SNPS_PHY_REG_PCS_LANE_RESET_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_PROTOCOL_CTRL_LEN    4
#define SNPS_PHY_REG_PIPE_LANE_PROTOCOL_CTRL_OFFSET 0

#define SNPS_PHY_REG_CR_PARA_SEL_LEN    1
#define SNPS_PHY_REG_CR_PARA_SEL_OFFSET 0

#define SNPS_PHY_REG_UPCS_PIPE_CONFIG_LEN    16
#define SNPS_PHY_REG_UPCS_PIPE_CONFIG_OFFSET 0

#define SNPS_PHY_REG_EXT_PCLK_REQ_LEN    1
#define SNPS_PHY_REG_EXT_PCLK_REQ_OFFSET 0

#define SNPS_PHY_REG_PCS_LANEX_CLKREQ_N_LEN    4
#define SNPS_PHY_REG_PCS_LANEX_CLKREQ_N_OFFSET 0

#define SNPS_PHY_REG_PCS_LANEX_LINK_NUM_LEN    16
#define SNPS_PHY_REG_PCS_LANEX_LINK_NUM_OFFSET 0

#define SNPS_PHY_REG_PCS_LANEX_PHY_SCR_SEL_LEN    8
#define SNPS_PHY_REG_PCS_LANEX_PHY_SCR_SEL_OFFSET 0

#define SNPS_PHY_REG_PHY_PG_MODE_EN_LEN    1
#define SNPS_PHY_REG_PHY_PG_MODE_EN_OFFSET 0

#define SNPS_PHY_REG_PHY_LANEX_TX2RX_SER_LB_EN_LEN    4
#define SNPS_PHY_REG_PHY_LANEX_TX2RX_SER_LB_EN_OFFSET 0

#define SNPS_PHY_REG_PHY_LANEX_RX2TX_PAR_LB_EN_LEN    4
#define SNPS_PHY_REG_PHY_LANEX_RX2TX_PAR_LB_EN_OFFSET 0

#define SNPS_PHY_REG_PCS_RX_DISABLE_LEN    4
#define SNPS_PHY_REG_PCS_RX_DISABLE_OFFSET 0

#define SNPS_PHY_REG_PCS_TX_DISABLE_LEN    4
#define SNPS_PHY_REG_PCS_TX_DISABLE_OFFSET 0

#define SNPS_PHY_REG_PHY_RX_TERMINATION_LEN    4
#define SNPS_PHY_REG_PHY_RX_TERMINATION_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANEX_POWER_PRESENT_LEN    4
#define SNPS_PHY_REG_PIPE_LANEX_POWER_PRESENT_OFFSET 0

#define SNPS_PHY_REG_PCS_PWR_EN_LEN        1
#define SNPS_PHY_REG_PCS_PWR_EN_OFFSET     16
#define SNPS_PHY_REG_PCS_PWR_STABLE_LEN    4
#define SNPS_PHY_REG_PCS_PWR_STABLE_OFFSET 0

#define SNPS_PHY_REG_PMA_PWR_EN_LEN        1
#define SNPS_PHY_REG_PMA_PWR_EN_OFFSET     16
#define SNPS_PHY_REG_PMA_PWR_STABLE_LEN    4
#define SNPS_PHY_REG_PMA_PWR_STABLE_OFFSET 0

#define SNPS_PHY_REG_UPCS_PWR_EN_LEN        1
#define SNPS_PHY_REG_UPCS_PWR_EN_OFFSET     1
#define SNPS_PHY_REG_UPCS_PWR_STABLE_LEN    1
#define SNPS_PHY_REG_UPCS_PWR_STABLE_OFFSET 0

#define SNPS_PHY_REG_PHY_LANE3_POWER_PRESENT_LEN    1
#define SNPS_PHY_REG_PHY_LANE3_POWER_PRESENT_OFFSET 3
#define SNPS_PHY_REG_PHY_LANE2_POWER_PRESENT_LEN    1
#define SNPS_PHY_REG_PHY_LANE2_POWER_PRESENT_OFFSET 2
#define SNPS_PHY_REG_PHY_LANE1_POWER_PRESENT_LEN    1
#define SNPS_PHY_REG_PHY_LANE1_POWER_PRESENT_OFFSET 1
#define SNPS_PHY_REG_PHY_LANE0_POWER_PRESENT_LEN    1
#define SNPS_PHY_REG_PHY_LANE0_POWER_PRESENT_OFFSET 0

#define SNPS_PHY_REG_PHY_ANA_PWR_STABLE_LEN    1
#define SNPS_PHY_REG_PHY_ANA_PWR_STABLE_OFFSET 1
#define SNPS_PHY_REG_PHY_ANA_PWR_EN_LEN        1
#define SNPS_PHY_REG_PHY_ANA_PWR_EN_OFFSET     0

#define SNPS_PHY_REG_PHY_SRAM_BYPASS_LEN    4
#define SNPS_PHY_REG_PHY_SRAM_BYPASS_OFFSET 0

#define SNPS_PHY_REG_SRAM_INIT_DONE_LEN      1
#define SNPS_PHY_REG_SRAM_INIT_DONE_OFFSET   16
#define SNPS_PHY_REG_SRAM_EXT_LD_DONE_LEN    4
#define SNPS_PHY_REG_SRAM_EXT_LD_DONE_OFFSET 0

#define SNPS_PHY_REG_PHY_REF_CLK_REPEAT_EN_LEN    1
#define SNPS_PHY_REG_PHY_REF_CLK_REPEAT_EN_OFFSET 2
#define SNPS_PHY_REG_PHY_RES_REQ_IN_LEN           1
#define SNPS_PHY_REG_PHY_RES_REQ_IN_OFFSET        1
#define SNPS_PHY_REG_PHY_REF_USE_PAD_LEN          1
#define SNPS_PHY_REG_PHY_REF_USE_PAD_OFFSET       0

#define SNPS_PHY_REG_PHY_RTUNE_ACK_LEN    1
#define SNPS_PHY_REG_PHY_RTUNE_ACK_OFFSET 1
#define SNPS_PHY_REG_PHY_RTUNE_REQ_LEN    1
#define SNPS_PHY_REG_PHY_RTUNE_REQ_OFFSET 0

#define SNPS_PHY_REG_PHY_DTB_OUT_LEN               2
#define SNPS_PHY_REG_PHY_DTB_OUT_OFFSET            6
#define SNPS_PHY_REG_PHY_TEST_TX_REG_CLK_EN_LEN    1
#define SNPS_PHY_REG_PHY_TEST_TX_REG_CLK_EN_OFFSET 5
#define SNPS_PHY_REG_PHY_TEST_FLYOVER_EN_LEN       1
#define SNPS_PHY_REG_PHY_TEST_FLYOVER_EN_OFFSET    4
#define SNPS_PHY_REG_PHY_TEST_STOP_CLK_EN_LEN      1
#define SNPS_PHY_REG_PHY_TEST_STOP_CLK_EN_OFFSET   3
#define SNPS_PHY_REG_PHY_TEST_POWER_DOWN_LEN       1
#define SNPS_PHY_REG_PHY_TEST_POWER_DOWN_OFFSET    2
#define SNPS_PHY_REG_PHY_TEST_BURNIN_LEN           1
#define SNPS_PHY_REG_PHY_TEST_BURNIN_OFFSET        1
#define SNPS_PHY_REG_PHY_BS_CE_LEN                 1
#define SNPS_PHY_REG_PHY_BS_CE_OFFSET              0

#define SNPS_PHY_REG_PHY_MPLLA_STATE_LEN       1
#define SNPS_PHY_REG_PHY_MPLLA_STATE_OFFSET    2
#define SNPS_PHY_REG_PHY_MPLLA_SSC_EN_LEN      1
#define SNPS_PHY_REG_PHY_MPLLA_SSC_EN_OFFSET   1
#define SNPS_PHY_REG_PHY_MPLLA_FORCE_EN_LEN    1
#define SNPS_PHY_REG_PHY_MPLLA_FORCE_EN_OFFSET 0

#define SNPS_PHY_REG_PHY_MPLLB_STATE_LEN       1
#define SNPS_PHY_REG_PHY_MPLLB_STATE_OFFSET    2
#define SNPS_PHY_REG_PHY_MPLLB_SSC_EN_LEN      1
#define SNPS_PHY_REG_PHY_MPLLB_SSC_EN_OFFSET   1
#define SNPS_PHY_REG_PHY_MPLLB_FORCE_EN_LEN    1
#define SNPS_PHY_REG_PHY_MPLLB_FORCE_EN_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_ALIGN_DETECT_LEN    1
#define SNPS_PHY_REG_PIPE_RX3_ALIGN_DETECT_OFFSET 3
#define SNPS_PHY_REG_PIPE_RX2_ALIGN_DETECT_LEN    1
#define SNPS_PHY_REG_PIPE_RX2_ALIGN_DETECT_OFFSET 2
#define SNPS_PHY_REG_PIPE_RX1_ALIGN_DETECT_LEN    1
#define SNPS_PHY_REG_PIPE_RX1_ALIGN_DETECT_OFFSET 1
#define SNPS_PHY_REG_PIPE_RX0_ALIGN_DETECT_LEN    1
#define SNPS_PHY_REG_PIPE_RX0_ALIGN_DETECT_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_STANDBY_STATUS_LEN    1
#define SNPS_PHY_REG_PIPE_RX3_STANDBY_STATUS_OFFSET 3
#define SNPS_PHY_REG_PIPE_RX2_STANDBY_STATUS_LEN    1
#define SNPS_PHY_REG_PIPE_RX2_STANDBY_STATUS_OFFSET 2
#define SNPS_PHY_REG_PIPE_RX1_STANDBY_STATUS_LEN    1
#define SNPS_PHY_REG_PIPE_RX1_STANDBY_STATUS_OFFSET 1
#define SNPS_PHY_REG_PIPE_RX0_STANDBY_STATUS_LEN    1
#define SNPS_PHY_REG_PIPE_RX0_STANDBY_STATUS_OFFSET 0

#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_INSERT_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_INSERT_OFFSET 2
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_INSERT_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_INSERT_OFFSET 1
#define SNPS_PHY_REG_PHY_SRAM_ALLOW_CORRECT_N_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_ALLOW_CORRECT_N_OFFSET 0

#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_ADDR_LEN    12
#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_ADDR_OFFSET 16
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_ADDR_LEN    12
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_ADDR_OFFSET 0

#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_OFFSET 1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_OFFSET 0

#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_INT_RO_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_INT_RO_OFFSET 1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_INT_RO_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_INT_RO_OFFSET 0

#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_INT_MASK_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_INT_MASK_OFFSET 1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_INT_MASK_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_INT_MASK_OFFSET 0

#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_INT_SET_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_2BIT_ECC_ERROR_INT_SET_OFFSET 1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_INT_SET_LEN    1
#define SNPS_PHY_REG_PHY_SRAM_1BIT_ECC_ERROR_INT_SET_OFFSET 0

#define SNPS_PHY_REG_SPHY_ECO_RESERVED0_LEN    32
#define SNPS_PHY_REG_SPHY_ECO_RESERVED0_OFFSET 0

#define SNPS_PHY_REG_SPHY_ECO_RESERVED1_LEN    32
#define SNPS_PHY_REG_SPHY_ECO_RESERVED1_OFFSET 0

#define SNPS_PHY_REG_SPHY_ECO_RESERVED2_LEN    32
#define SNPS_PHY_REG_SPHY_ECO_RESERVED2_OFFSET 0

#define SNPS_PHY_REG_SPHY_ECO_RESERVED3_LEN    32
#define SNPS_PHY_REG_SPHY_ECO_RESERVED3_OFFSET 0

#define SNPS_PHY_REG_SPHY_ECO_RESERVED4_LEN    32
#define SNPS_PHY_REG_SPHY_ECO_RESERVED4_OFFSET 0

#define SNPS_PHY_REG_SPHY_ECO_RESERVED5_LEN    32
#define SNPS_PHY_REG_SPHY_ECO_RESERVED5_OFFSET 0

#define SNPS_PHY_REG_SPHY_ECO_RESERVED6_LEN    32
#define SNPS_PHY_REG_SPHY_ECO_RESERVED6_OFFSET 0

#define SNPS_PHY_REG_SPHY_ECO_RESERVED7_LEN    32
#define SNPS_PHY_REG_SPHY_ECO_RESERVED7_OFFSET 0

#define SNPS_PHY_REG_PHY_EXT_CTRL_SEL_LEN    1
#define SNPS_PHY_REG_PHY_EXT_CTRL_SEL_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_BS_TX_LOWSWING_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_BS_TX_LOWSWING_OFFSET 6
#define SNPS_PHY_REG_PROTOCOL0_EXT_BS_RX_BIGSWING_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_BS_RX_BIGSWING_OFFSET 5
#define SNPS_PHY_REG_PROTOCOL0_EXT_BS_RX_LEVEL_LEN       5
#define SNPS_PHY_REG_PROTOCOL0_EXT_BS_RX_LEVEL_OFFSET    0

#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_BANDWIDTH_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_BANDWIDTH_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_WORD_DIV2_EN_LEN      1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_WORD_DIV2_EN_OFFSET   7
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_TX_CLK_DIV_LEN        3
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_TX_CLK_DIV_OFFSET     4
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV10_CLK_EN_LEN      1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV10_CLK_EN_OFFSET   3
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV16P5_CLK_EN_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV16P5_CLK_EN_OFFSET 2
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV8_CLK_EN_LEN       1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV8_CLK_EN_OFFSET    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV_CLK_EN_LEN        1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV_CLK_EN_OFFSET     0

#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_MULTIPLIER_LEN        8
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_MULTIPLIER_OFFSET     24
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_FRACN_CTRL_LEN        11
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_FRACN_CTRL_OFFSET     8
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV_MULTIPLIER_LEN    8
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_DIV_MULTIPLIER_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_RANGE_LEN               3
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_RANGE_OFFSET            24
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_FREQ_CNT_PEAK_LEN       8
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_FREQ_CNT_PEAK_OFFSET    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_FREQ_CNT_OVRD_EN_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_FREQ_CNT_OVRD_EN_OFFSET 15
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_CLK_SEL_LEN             3
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_CLK_SEL_OFFSET          12
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_FREQ_CNT_INIT_LEN       12
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLA_SSC_FREQ_CNT_INIT_OFFSET    0

#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_BANDWIDTH_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_BANDWIDTH_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_WORD_DIV2_EN_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_WORD_DIV2_EN_OFFSET 7
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_TX_CLK_DIV_LEN      3
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_TX_CLK_DIV_OFFSET   4
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_DIV10_CLK_EN_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_DIV10_CLK_EN_OFFSET 3
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_DIV8_CLK_EN_LEN     1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_DIV8_CLK_EN_OFFSET  1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_DIV_CLK_EN_LEN      1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_DIV_CLK_EN_OFFSET   0

#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_MULTIPLIER_LEN        8
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_MULTIPLIER_OFFSET     24
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_FRACN_CTRL_LEN        11
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_FRACN_CTRL_OFFSET     8
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_DIV_MULTIPLIER_LEN    8
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_DIV_MULTIPLIER_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_RANGE_LEN               3
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_RANGE_OFFSET            24
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_FREQ_CNT_PEAK_LEN       8
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_FREQ_CNT_PEAK_OFFSET    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_FREQ_CNT_OVRD_EN_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_FREQ_CNT_OVRD_EN_OFFSET 15
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_CLK_SEL_LEN             3
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_CLK_SEL_OFFSET          12
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_FREQ_CNT_INIT_LEN       12
#define SNPS_PHY_REG_PROTOCOL0_EXT_MPLLB_SSC_FREQ_CNT_INIT_OFFSET    0

#define SNPS_PHY_REG_PROTOCOL0_EXT_REF_CLK_MPLLB_DIV2_EN_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_REF_CLK_MPLLB_DIV2_EN_OFFSET 2
#define SNPS_PHY_REG_PROTOCOL0_EXT_REF_CLK_MPLLA_DIV2_EN_LEN    1
#define SNPS_PHY_REG_PROTOCOL0_EXT_REF_CLK_MPLLA_DIV2_EN_OFFSET 1
#define SNPS_PHY_REG_PROTOCOL0_EXT_REF_CLK_DIV2_EN_LEN          1
#define SNPS_PHY_REG_PROTOCOL0_EXT_REF_CLK_DIV2_EN_OFFSET       0

#define SNPS_PHY_REG_PROTOCOL0_EXT_REF_RANGE_LEN    3
#define SNPS_PHY_REG_PROTOCOL0_EXT_REF_RANGE_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_AFE_EN_G4_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_AFE_EN_G4_OFFSET 12
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_AFE_EN_G3_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_AFE_EN_G3_OFFSET 8
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_AFE_EN_G2_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_AFE_EN_G2_OFFSET 4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_AFE_EN_G1_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_AFE_EN_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_DFE_EN_G4_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_DFE_EN_G4_OFFSET 12
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_DFE_EN_G3_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_DFE_EN_G3_OFFSET 8
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_DFE_EN_G2_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_DFE_EN_G2_OFFSET 4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_DFE_EN_G1_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_ADAPT_DFE_EN_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_AFE_GAIN_G2_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_AFE_GAIN_G2_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_AFE_GAIN_G1_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_AFE_GAIN_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_AFE_GAIN_G4_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_AFE_GAIN_G4_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_AFE_GAIN_G3_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_AFE_GAIN_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_ATT_LVL_G2_LEN    12
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_ATT_LVL_G2_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_ATT_LVL_G1_LEN    12
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_ATT_LVL_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_ATT_LVL_G4_LEN    12
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_ATT_LVL_G4_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_ATT_LVL_G3_LEN    12
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_ATT_LVL_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_CTLE_BOOST_G1_LEN    20
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_CTLE_BOOST_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_CTLE_BOOST_G2_LEN    20
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_CTLE_BOOST_G2_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_CTLE_BOOST_G3_LEN    20
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_CTLE_BOOST_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_CTLE_BOOST_G4_LEN    20
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_CTLE_BOOST_G4_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DELTA_IQ_G2_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DELTA_IQ_G2_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DELTA_IQ_G1_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DELTA_IQ_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DELTA_IQ_G4_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DELTA_IQ_G4_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DELTA_IQ_G3_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DELTA_IQ_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DFE_TAP1_G1_LEN    32
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DFE_TAP1_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DFE_TAP1_G2_LEN    32
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DFE_TAP1_G2_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DFE_TAP1_G3_LEN    32
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DFE_TAP1_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DFE_TAP1_G4_LEN    32
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_EQ_DFE_TAP1_G4_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_LOS_LFPS_EN_LEN       1
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_LOS_LFPS_EN_OFFSET    31
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_LOS_THRESHOLD_LEN     12
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_LOS_THRESHOLD_OFFSET  16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_LOS_PWR_UP_CNT_LEN    11
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_LOS_PWR_UP_CNT_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_REF_LD_VAL_G4_LEN    6
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_REF_LD_VAL_G4_OFFSET 24
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_REF_LD_VAL_G3_LEN    6
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_REF_LD_VAL_G3_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_REF_LD_VAL_G2_LEN    6
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_REF_LD_VAL_G2_OFFSET 8
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_REF_LD_VAL_G1_LEN    6
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_REF_LD_VAL_G1_OFFSET 0

#define SNPS_PHY_REG_PHY_RX_TERM_ACDC_LEN              4
#define SNPS_PHY_REG_PHY_RX_TERM_ACDC_OFFSET           4
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_TERM_CTRL_LEN    3
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_TERM_CTRL_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VCO_LD_VAL_G2_LEN    13
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VCO_LD_VAL_G2_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VCO_LD_VAL_G1_LEN    13
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VCO_LD_VAL_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VCO_LD_VAL_G4_LEN    13
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VCO_LD_VAL_G4_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VCO_LD_VAL_G3_LEN    13
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VCO_LD_VAL_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VREF_CTRL_LEN    5
#define SNPS_PHY_REG_PROTOCOL0_EXT_RX_VREF_CTRL_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_PRE_G1_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_PRE_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_PRE_G2_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_PRE_G2_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_PRE_G3_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_PRE_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_MAIN_G1_LEN    20
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_MAIN_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_MAIN_G2_LEN    20
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_MAIN_G2_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_MAIN_G3_LEN    20
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_MAIN_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_POST_G1_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_POST_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_POST_G2_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_POST_G2_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_POST_G3_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_POST_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_OVRD_G2_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_OVRD_G2_OFFSET 16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_OVRD_G1_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_OVRD_G1_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_OVRD_G3_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_EQ_OVRD_G3_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_IBOOST_LVL_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_IBOOST_LVL_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_VBOOST_LVL_LEN    16
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_VBOOST_LVL_OFFSET 0

#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_TERM_CTRL_LEN    4
#define SNPS_PHY_REG_PROTOCOL0_EXT_TX_TERM_CTRL_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX_VALID_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_RX_VALID_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX_VALID_OVERRIDE_VALUE_LEN    4
#define SNPS_PHY_REG_PIPE_RX_VALID_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX_ELECIDLE_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_RX_ELECIDLE_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX_ELECIDLE_OVERRIDE_VALUE_LEN    4
#define SNPS_PHY_REG_PIPE_RX_ELECIDLE_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX_ELECIDLE_MODE_LEN    16
#define SNPS_PHY_REG_PIPE_RX_ELECIDLE_MODE_OFFSET 0

#define SNPS_PHY_REG_SPHY_REG_RXELECIDLE_DELAY_TIME_0_LEN    24
#define SNPS_PHY_REG_SPHY_REG_RXELECIDLE_DELAY_TIME_0_OFFSET 0

#define SNPS_PHY_REG_SPHY_REG_RXELECIDLE_DELAY_TIME_1_LEN    24
#define SNPS_PHY_REG_SPHY_REG_RXELECIDLE_DELAY_TIME_1_OFFSET 0

#define SNPS_PHY_REG_SPHY_REG_RXELECIDLE_DELAY_TIME_2_LEN    24
#define SNPS_PHY_REG_SPHY_REG_RXELECIDLE_DELAY_TIME_2_OFFSET 0

#define SNPS_PHY_REG_SPHY_REG_RXELECIDLE_DELAY_TIME_3_LEN    24
#define SNPS_PHY_REG_SPHY_REG_RXELECIDLE_DELAY_TIME_3_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX_EQ_FIG_MERIT_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_RX_EQ_FIG_MERIT_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX_EQ_FIG_MERIT_OVERRIDE_VALUE_LEN    32
#define SNPS_PHY_REG_PIPE_RX_EQ_FIG_MERIT_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX_STATUS_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_RX_STATUS_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_STATUS_OVERRIDE_VALUE_LEN    3
#define SNPS_PHY_REG_PIPE_RX3_STATUS_OVERRIDE_VALUE_OFFSET 12
#define SNPS_PHY_REG_PIPE_RX2_STATUS_OVERRIDE_VALUE_LEN    3
#define SNPS_PHY_REG_PIPE_RX2_STATUS_OVERRIDE_VALUE_OFFSET 8
#define SNPS_PHY_REG_PIPE_RX1_STATUS_OVERRIDE_VALUE_LEN    3
#define SNPS_PHY_REG_PIPE_RX1_STATUS_OVERRIDE_VALUE_OFFSET 4
#define SNPS_PHY_REG_PIPE_RX0_STATUS_OVERRIDE_VALUE_LEN    3
#define SNPS_PHY_REG_PIPE_RX0_STATUS_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_PHYSTATUS_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_LANE_PHYSTATUS_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_PHYSTATUS_OVERRIDE_VALUE_LEN    4
#define SNPS_PHY_REG_PIPE_LANE_PHYSTATUS_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_POWERDOWN_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_LANE_POWERDOWN_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_POWERDOWN_OVERRIDE_VALUE_LEN    16
#define SNPS_PHY_REG_PIPE_LANE_POWERDOWN_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_RATE_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_LANE_RATE_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_RATE_OVERRIDE_VALUE_LEN    8
#define SNPS_PHY_REG_PIPE_LANE_RATE_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_RX_POLARITY_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_LANE_RX_POLARITY_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_LANE_RX_POLARITY_OVERRIDE_VALUE_LEN    4
#define SNPS_PHY_REG_PIPE_LANE_RX_POLARITY_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX_COMPLIANCE_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_TX_COMPLIANCE_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX_COMPLIANCE_OVERRIDE_VALUE_LEN    4
#define SNPS_PHY_REG_PIPE_TX_COMPLIANCE_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX_ELECIDLE_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_TX_ELECIDLE_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX_ELECIDLE_OVERRIDE_VALUE_LEN    4
#define SNPS_PHY_REG_PIPE_TX_ELECIDLE_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX_MARGIN_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_TX_MARGIN_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX3_MARGIN_OVERRIDE_VALUE_LEN    3
#define SNPS_PHY_REG_PIPE_TX3_MARGIN_OVERRIDE_VALUE_OFFSET 12
#define SNPS_PHY_REG_PIPE_TX2_MARGIN_OVERRIDE_VALUE_LEN    3
#define SNPS_PHY_REG_PIPE_TX2_MARGIN_OVERRIDE_VALUE_OFFSET 8
#define SNPS_PHY_REG_PIPE_TX1_MARGIN_OVERRIDE_VALUE_LEN    3
#define SNPS_PHY_REG_PIPE_TX1_MARGIN_OVERRIDE_VALUE_OFFSET 4
#define SNPS_PHY_REG_PIPE_TX0_MARGIN_OVERRIDE_VALUE_LEN    3
#define SNPS_PHY_REG_PIPE_TX0_MARGIN_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX_DEEMPH_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_TX_DEEMPH_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX0_DEEMPH_OVERRIDE_VALUE_LEN    18
#define SNPS_PHY_REG_PIPE_TX0_DEEMPH_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX1_DEEMPH_OVERRIDE_VALUE_LEN    18
#define SNPS_PHY_REG_PIPE_TX1_DEEMPH_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX2_DEEMPH_OVERRIDE_VALUE_LEN    18
#define SNPS_PHY_REG_PIPE_TX2_DEEMPH_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX3_DEEMPH_OVERRIDE_VALUE_LEN    18
#define SNPS_PHY_REG_PIPE_TX3_DEEMPH_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX_DETECTRX_OVERRIDE_LEN    4
#define SNPS_PHY_REG_PIPE_TX_DETECTRX_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX_DETECTRX_OVERRIDE_VALUE_LEN    4
#define SNPS_PHY_REG_PIPE_TX_DETECTRX_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_FORCE_RXDETECT_RESULT_LEN    4
#define SNPS_PHY_REG_FORCE_RXDETECT_RESULT_OFFSET 0

#define SNPS_PHY_REG_FORCE_RXDETECT_RESULT_VALUE_LEN    4
#define SNPS_PHY_REG_FORCE_RXDETECT_RESULT_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_SRIS_MODE_EN_LEN    1
#define SNPS_PHY_REG_PIPE_RX3_SRIS_MODE_EN_OFFSET 3
#define SNPS_PHY_REG_PIPE_RX2_SRIS_MODE_EN_LEN    1
#define SNPS_PHY_REG_PIPE_RX2_SRIS_MODE_EN_OFFSET 2
#define SNPS_PHY_REG_PIPE_RX1_SRIS_MODE_EN_LEN    1
#define SNPS_PHY_REG_PIPE_RX1_SRIS_MODE_EN_OFFSET 1
#define SNPS_PHY_REG_PIPE_RX0_SRIS_MODE_EN_LEN    1
#define SNPS_PHY_REG_PIPE_RX0_SRIS_MODE_EN_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_STATUS_DEBUG_EN_LEN    8
#define SNPS_PHY_REG_PIPE_RX3_STATUS_DEBUG_EN_OFFSET 24
#define SNPS_PHY_REG_PIPE_RX2_STATUS_DEBUG_EN_LEN    8
#define SNPS_PHY_REG_PIPE_RX2_STATUS_DEBUG_EN_OFFSET 16
#define SNPS_PHY_REG_PIPE_RX1_STATUS_DEBUG_EN_LEN    8
#define SNPS_PHY_REG_PIPE_RX1_STATUS_DEBUG_EN_OFFSET 8
#define SNPS_PHY_REG_PIPE_RX0_STATUS_DEBUG_EN_LEN    8
#define SNPS_PHY_REG_PIPE_RX0_STATUS_DEBUG_EN_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_STATUS_DEBUG_MODE_LEN    4
#define SNPS_PHY_REG_PIPE_RX3_STATUS_DEBUG_MODE_OFFSET 12
#define SNPS_PHY_REG_PIPE_RX2_STATUS_DEBUG_MODE_LEN    4
#define SNPS_PHY_REG_PIPE_RX2_STATUS_DEBUG_MODE_OFFSET 8
#define SNPS_PHY_REG_PIPE_RX1_STATUS_DEBUG_MODE_LEN    4
#define SNPS_PHY_REG_PIPE_RX1_STATUS_DEBUG_MODE_OFFSET 4
#define SNPS_PHY_REG_PIPE_RX0_STATUS_DEBUG_MODE_LEN    4
#define SNPS_PHY_REG_PIPE_RX0_STATUS_DEBUG_MODE_OFFSET 0



#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_STATUS_LEN    7
#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_STATUS_OFFSET 24
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_STATUS_LEN    7
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_STATUS_OFFSET 16
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_STATUS_LEN    7
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_STATUS_OFFSET 8
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_STATUS_LEN    7
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_STATUS_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_STATUS_INT_RO_LEN    7
#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_STATUS_INT_RO_OFFSET 24
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_STATUS_INT_RO_LEN    7
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_STATUS_INT_RO_OFFSET 16
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_STATUS_INT_RO_LEN    7
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_STATUS_INT_RO_OFFSET 8
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_STATUS_INT_RO_LEN    7
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_STATUS_INT_RO_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_STATUS_INT_MASK_LEN    7
#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_STATUS_INT_MASK_OFFSET 24
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_STATUS_INT_MASK_LEN    7
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_STATUS_INT_MASK_OFFSET 16
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_STATUS_INT_MASK_LEN    7
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_STATUS_INT_MASK_OFFSET 8
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_STATUS_INT_MASK_LEN    7
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_STATUS_INT_MASK_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_STATUS_INT_SET_LEN    7
#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_STATUS_INT_SET_OFFSET 24
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_STATUS_INT_SET_LEN    7
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_STATUS_INT_SET_OFFSET 16
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_STATUS_INT_SET_LEN    7
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_STATUS_INT_SET_OFFSET 8
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_STATUS_INT_SET_LEN    7
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_STATUS_INT_SET_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_COUNT_LEN    32
#define SNPS_PHY_REG_PIPE_RX0_STATUS_ERR_COUNT_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_COUNT_LEN    32
#define SNPS_PHY_REG_PIPE_RX1_STATUS_ERR_COUNT_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_COUNT_LEN    32
#define SNPS_PHY_REG_PIPE_RX2_STATUS_ERR_COUNT_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_COUNT_LEN    32
#define SNPS_PHY_REG_PIPE_RX3_STATUS_ERR_COUNT_OFFSET 0

#define SNPS_PHY_REG_SET_LANE3_EYE_EVAL_START_LEN    1
#define SNPS_PHY_REG_SET_LANE3_EYE_EVAL_START_OFFSET 3
#define SNPS_PHY_REG_SET_LANE2_EYE_EVAL_START_LEN    1
#define SNPS_PHY_REG_SET_LANE2_EYE_EVAL_START_OFFSET 2
#define SNPS_PHY_REG_SET_LANE1_EYE_EVAL_START_LEN    1
#define SNPS_PHY_REG_SET_LANE1_EYE_EVAL_START_OFFSET 1
#define SNPS_PHY_REG_SET_LANE0_EYE_EVAL_START_LEN    1
#define SNPS_PHY_REG_SET_LANE0_EYE_EVAL_START_OFFSET 0

#define SNPS_PHY_REG_LANE3_EYE_EVAL_DONE_LEN    1
#define SNPS_PHY_REG_LANE3_EYE_EVAL_DONE_OFFSET 3
#define SNPS_PHY_REG_LANE2_EYE_EVAL_DONE_LEN    1
#define SNPS_PHY_REG_LANE2_EYE_EVAL_DONE_OFFSET 2
#define SNPS_PHY_REG_LANE1_EYE_EVAL_DONE_LEN    1
#define SNPS_PHY_REG_LANE1_EYE_EVAL_DONE_OFFSET 1
#define SNPS_PHY_REG_LANE0_EYE_EVAL_DONE_LEN    1
#define SNPS_PHY_REG_LANE0_EYE_EVAL_DONE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_EQ_FIG_MERIT_VALUE_LEN    8
#define SNPS_PHY_REG_PIPE_RX3_EQ_FIG_MERIT_VALUE_OFFSET 24
#define SNPS_PHY_REG_PIPE_RX2_EQ_FIG_MERIT_VALUE_LEN    8
#define SNPS_PHY_REG_PIPE_RX2_EQ_FIG_MERIT_VALUE_OFFSET 16
#define SNPS_PHY_REG_PIPE_RX1_EQ_FIG_MERIT_VALUE_LEN    8
#define SNPS_PHY_REG_PIPE_RX1_EQ_FIG_MERIT_VALUE_OFFSET 8
#define SNPS_PHY_REG_PIPE_RX0_EQ_FIG_MERIT_VALUE_LEN    8
#define SNPS_PHY_REG_PIPE_RX0_EQ_FIG_MERIT_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_EQ_EVAL_VALUE_LEN    1
#define SNPS_PHY_REG_PIPE_RX3_EQ_EVAL_VALUE_OFFSET 3
#define SNPS_PHY_REG_PIPE_RX2_EQ_EVAL_VALUE_LEN    1
#define SNPS_PHY_REG_PIPE_RX2_EQ_EVAL_VALUE_OFFSET 2
#define SNPS_PHY_REG_PIPE_RX1_EQ_EVAL_VALUE_LEN    1
#define SNPS_PHY_REG_PIPE_RX1_EQ_EVAL_VALUE_OFFSET 1
#define SNPS_PHY_REG_PIPE_RX0_EQ_EVAL_VALUE_LEN    1
#define SNPS_PHY_REG_PIPE_RX0_EQ_EVAL_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_EQ_EVAL_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_RX3_EQ_EVAL_OVERRIDE_OFFSET 3
#define SNPS_PHY_REG_PIPE_RX2_EQ_EVAL_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_RX2_EQ_EVAL_OVERRIDE_OFFSET 2
#define SNPS_PHY_REG_PIPE_RX1_EQ_EVAL_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_RX1_EQ_EVAL_OVERRIDE_OFFSET 1
#define SNPS_PHY_REG_PIPE_RX0_EQ_EVAL_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_RX0_EQ_EVAL_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_EQ_EVAL_OVERRIDE_VALUE_LEN    1
#define SNPS_PHY_REG_PIPE_RX3_EQ_EVAL_OVERRIDE_VALUE_OFFSET 3
#define SNPS_PHY_REG_PIPE_RX2_EQ_EVAL_OVERRIDE_VALUE_LEN    1
#define SNPS_PHY_REG_PIPE_RX2_EQ_EVAL_OVERRIDE_VALUE_OFFSET 2
#define SNPS_PHY_REG_PIPE_RX1_EQ_EVAL_OVERRIDE_VALUE_LEN    1
#define SNPS_PHY_REG_PIPE_RX1_EQ_EVAL_OVERRIDE_VALUE_OFFSET 1
#define SNPS_PHY_REG_PIPE_RX0_EQ_EVAL_OVERRIDE_VALUE_LEN    1
#define SNPS_PHY_REG_PIPE_RX0_EQ_EVAL_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX3_EQ_FS_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_TX3_EQ_FS_OVERRIDE_OFFSET 3
#define SNPS_PHY_REG_PIPE_TX2_EQ_FS_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_TX2_EQ_FS_OVERRIDE_OFFSET 2
#define SNPS_PHY_REG_PIPE_TX1_EQ_FS_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_TX1_EQ_FS_OVERRIDE_OFFSET 1
#define SNPS_PHY_REG_PIPE_TX0_EQ_FS_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_TX0_EQ_FS_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX3_EQ_FS_OVERRIDE_VALUE_LEN    6
#define SNPS_PHY_REG_PIPE_TX3_EQ_FS_OVERRIDE_VALUE_OFFSET 24
#define SNPS_PHY_REG_PIPE_TX2_EQ_FS_OVERRIDE_VALUE_LEN    6
#define SNPS_PHY_REG_PIPE_TX2_EQ_FS_OVERRIDE_VALUE_OFFSET 16
#define SNPS_PHY_REG_PIPE_TX1_EQ_FS_OVERRIDE_VALUE_LEN    6
#define SNPS_PHY_REG_PIPE_TX1_EQ_FS_OVERRIDE_VALUE_OFFSET 8
#define SNPS_PHY_REG_PIPE_TX0_EQ_FS_OVERRIDE_VALUE_LEN    6
#define SNPS_PHY_REG_PIPE_TX0_EQ_FS_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX3_EQ_LF_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_TX3_EQ_LF_OVERRIDE_OFFSET 3
#define SNPS_PHY_REG_PIPE_TX2_EQ_LF_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_TX2_EQ_LF_OVERRIDE_OFFSET 2
#define SNPS_PHY_REG_PIPE_TX1_EQ_LF_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_TX1_EQ_LF_OVERRIDE_OFFSET 1
#define SNPS_PHY_REG_PIPE_TX0_EQ_LF_OVERRIDE_LEN    1
#define SNPS_PHY_REG_PIPE_TX0_EQ_LF_OVERRIDE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX3_EQ_LF_OVERRIDE_VALUE_LEN    6
#define SNPS_PHY_REG_PIPE_TX3_EQ_LF_OVERRIDE_VALUE_OFFSET 24
#define SNPS_PHY_REG_PIPE_TX2_EQ_LF_OVERRIDE_VALUE_LEN    6
#define SNPS_PHY_REG_PIPE_TX2_EQ_LF_OVERRIDE_VALUE_OFFSET 16
#define SNPS_PHY_REG_PIPE_TX1_EQ_LF_OVERRIDE_VALUE_LEN    6
#define SNPS_PHY_REG_PIPE_TX1_EQ_LF_OVERRIDE_VALUE_OFFSET 8
#define SNPS_PHY_REG_PIPE_TX0_EQ_LF_OVERRIDE_VALUE_LEN    6
#define SNPS_PHY_REG_PIPE_TX0_EQ_LF_OVERRIDE_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX0_DEEMPH_VALUE_LEN    18
#define SNPS_PHY_REG_PIPE_TX0_DEEMPH_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX1_DEEMPH_VALUE_LEN    18
#define SNPS_PHY_REG_PIPE_TX1_DEEMPH_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX2_DEEMPH_VALUE_LEN    18
#define SNPS_PHY_REG_PIPE_TX2_DEEMPH_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_TX3_DEEMPH_VALUE_LEN    18
#define SNPS_PHY_REG_PIPE_TX3_DEEMPH_VALUE_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX1_EBUFF_LOCATION_LEN    9
#define SNPS_PHY_REG_PIPE_RX1_EBUFF_LOCATION_OFFSET 16
#define SNPS_PHY_REG_PIPE_RX0_EBUFF_LOCATION_LEN    9
#define SNPS_PHY_REG_PIPE_RX0_EBUFF_LOCATION_OFFSET 0

#define SNPS_PHY_REG_PIPE_RX3_EBUFF_LOCATION_LEN    9
#define SNPS_PHY_REG_PIPE_RX3_EBUFF_LOCATION_OFFSET 16
#define SNPS_PHY_REG_PIPE_RX2_EBUFF_LOCATION_LEN    9
#define SNPS_PHY_REG_PIPE_RX2_EBUFF_LOCATION_OFFSET 0

#endif // __SNPS_PHY_REG_REG_OFFSET_FIELD_H__
